Application of IEESD-2000 for Hardware/Software Co-Development Through Whole Embedded System Design Cycle Michael Dolinsky Gomel Fr.Scaryna State University, Belarus Dolinsky@gsu.unibel.by http://NewIT.gsu.unibel.by/ieesd-2000 Introduction Explosive extension of embedded systems application domains is a global trend in the last years. Consumer electronics, telecommunications, Internet appliances, automotive electronics, multimedia processing - that are only few from such application domains. Another sign trend is using System-On-a-Chip (SOC) approach to develop recent embedded systems. By definition, the SOCs include such components as processors, so extremely important is becoming integrated development or CO-development of hardware (HW) and software (SW) with real or in high degree adequate virtual external environment, in other words, verification environment (VE), through whole design cycle. Unfortunately, modern tools for HW/SW co-development (including high quality co-design, co-verification and co-simulation) is not adequate with designer needs. For example, design verification takes up to 70-80 percent of design man-power resources as well as for the most of the recent design team is usual to have 2-3 verification engineer for each design engineer. Such situation, evidently, can't satisfy the EDA community so there are active attempts for creation new tools for HW/SW co-development. 1. State And Problems Of Tools For Embedded Systems Hardware/Software Co-Development 1.1. Hardware Development Tendencies Recent microelectronic technologies allow a chip to contain millions of gates and memory bits on the FPGA as well as on ASIC. At the same time the frequency is rising. All that provides new application domains as well as exacerbate the problem of productivity of design and verification. How EDA community answers that challenge? What may provide scheduling cutting as well as good quality of designs? The first answer is IP (Intellectual Property) market. That is the base of design reuse methodology. In addition to IP components families for devices with middle complexity (registers, RAMs, ROMs, adders, selectors etc.) there are the IP for RISC and DSP processors. More over, some from these CPU cores are configurable, from ARC, Tensilica, Improv Systems - for example. The following step is platform-oriented design - which is provided, for example, by Altera (Excalibur with one from CPUs Nios, ARM, MIPS), Atmel (FPSLIC with AVR or MIPS), Triscend (E5 with Intel 8051, A7 with ARM7TDMI), PalmChip (PalPAK with ARC), picoTurbo (picoPACK with pT-100, pT-110). There are already dual-core (RISC+DSP) platforms from Philips (Nexperia), Siroyan(OPUS), Texas Instruments (OMAP), Motorola (DSP56800E), Hyperstone (E132XS), Improve (Jazz+ARM) With such platforms designers get up to 80 percent of developed hardware, software and verification environment. Modern network application demands even more processors on a chip. Lexra announced simmetric multiprocessor system with 16 LX8380 (MIPS-compatible CPU). IBM Microelectronics works on reconfiguring network chip with 174 Xtensa CPU (from Tensilica). ARC Cores do the like job with 260 ARC CPU. Finally DAC 2001 highlights the new reality - "Network-on-a-Chip". In some papers there are proposed to develop the network infrastructures from CDMA (as for local networks) to OSI (as for the most complex global networks) on a chip as the base for chip components integration (with such components as CPUs, memories, peripherals and special blocks). 1.2. Software Development Tendencies The presence of CPU cores in embedded system causes the importance of the rapid software development to provide "time-to-market". We can mark the two tendencies: The first tendency is the active use of C/C++ for the software development rather then assembler. To provide that the according tools: compilers, source-level debuggers, simulators and emulators are developed. Some of the developers try to do the retargetable tools. The second tendency is developing some metalanguage (UML, for example) for describing the system functions with following target software generating. 1.3. EDA Tools Development Tendencies As verification is the most challenge in recent design processes, the base direction of EDA tools development is the co-development (co-design, co-verification, co-simulation) of hardware and software of embedded system through whole design cycle. Another tendency - universal approach for EDA tools development for hardware as well as for software. Universal approach denotes that the same tools are used for a number of target architectures. Such approach provides the lower cost of the development tools (comparing with summary cost of different tools for different architectures) as well as the lower time for learning to work with the tools. Finally, the Internet creates the new possibilities for embedded systems development. There are separate companies for design, verification, manufacturing that are effectively using the Internet for information exchange. 1.4. Tendencies In Embedded Systems Development Education It is evidently, that such global changes in the academy and industry evoke changes in the ways for engineers education. The main changes are the following: - orientation of studying process to final results (Engineering Criteria 2000) - international cooperation - introduction of research components - WWW systems for automatic testing - WWW sites with studying materials - student contests on embedded systems development. Finally, EDA community do the most for organization of continuous learning of industry engineers on the Internet base as well. 2. Conceptual foundations of the Integrated Environment for Embedded Systems Development (IEESD-2000). This section is devoted for introduction of conceptual foundations of IEESD-2000 - tools for embedded systems hardware/ software co-development (co-design, co-verification, co-simulation). The IEESD-2000, implemented in Gomel Fr.Scaryna State University, is successfully used in real embedded systems development, researches and university education [1-5]. 2.1. Universality. One of the base trends in recent embedded systems is a diversity of using hardware platforms including different microprocessors(MP), microcontrollers (MC), and digital signal processors (DSP). As a result the modern tools for embedded systems development need to provide work with different MPs, MCs, DSPs. The IEESD-2000 provide open universal API to interact with modelling components. Such approach allows to develop models of any MPs, MCs, DSPs and other complex hardware/software/verification components and include them into common simulated composition. Optimized event-driven simulation mechanism provides fast and proven simulation for composed embedded systems including multiprocessor embedded systems. In addition, there are special tool and technology for rapid development of CPU models and their peripherals in parallel with assembler/disassembler. By the moment there are the models for Intel 8051, Atmel AVR, Motorola 68HC08, Microchip PIC and Texas Instrument TMS370 families. The IEESD-2000 includes rich library of component with parameters including logical gates, coders, decoders, selectors, adders, comparators, flip-flops, registers, counters, RAM, ROM. Each component in the library has parameters, graphic symbol, annotation, simulation model, and the tool for generating synthesizable VHDL description of the component with instantiated parameters. There is supported creation of user components and project libraries. The IEESD-2000 support visual design with graphic symbols in both "top-down" and "bottom-up" techniques. To provide software debugging the IEESD-2000 includes retargettable assembler library RtASM as well as special libraries for debug information storing/loading and linking of object and library modules. The possibility to use programming languages with level higher rather assembler is provided with family of debug information convertors. In addition, there are own compilers compiler UniSAn, that can be used to do new compilers. The UniSAn was used for RtASM creation. The important feature of tools for embedded system development is emulation of the project: CPUs as well as the rest hardware. The IEESD-2000 includes universal in-circuit simulator UniICS, which provide interaction of simulated in the IEESD-2000 part of the project with part of the project on the real embedded systems board. Also the IEESD-2000 includes universal in-circuit emulator UniICE, which provide interaction of emulated CPU with the debug environment. 2.2. Automatic Generation Of Lower Level Descriptions Of The Debugged Embedded System For debugged hardware part of the project there may be automatically generated synthesizable VHDL-description, that may be used in the synthesis and manufacturing EDA tools. For debugged software part of the project there may be automatically generated target machine codes to be loaded into ROMs and RAMs of the project. In addition, the simulation results may be used for automatic generation of the testbenches, that may be used in the synthesis and manufacturing EDA tools. So designer get the seamless transition to the lower level design stream. 2.3. Team And Distributed Development Support. IEESD-2000 allows installation on the Windows NT/2000 server of the network with possibility to start it and work from any of the network workstations (Windows 95/98/NT/2000). In addition, part of the project data can be used from server as well as part of the project data can be allocated on the workstation. There is secure strategy of the project data refreshing on the server. 2.4. Verification Through Whole Design Cycle There are about 700 test projects which are used for automatic regressive testing of the IEESD-2000 during development as well as for release control. The test execution includes: the projects compilation and simulation in IEESD-2000, generation of synthesizable VHDL descriptions and tests, compilation and simulation generated VHDL descriptions with the same tests in Max+Plus II. The results of the regressive testing are accumulated on the special internal WEB-site. There are special script language that allow to organize such regressive testing of the user's projects. The verification through whole design cycle may be provided in the following way. At first, designers team creates the verification environments for interactive and batch project testing. Designers can use verification and programming languages, as well as special IEESD-2000 test language. In addition, to put the test onto the project a verification engineer can use UniICS (in-circuit simulator) for using real devices, or special software, that interact with the project by means IBM PC ports or bus. For interactive project testing there may be used special test components, providing keyboard and mouse using to put test data on the project. It is very important to do 'golden model' of the designed embedded system in parallel with verification environment creation. This 'golden model' allows to prove all testbenches correctness as well as to provide good understanding and interaction between design and verification engineers. The 'golden model' may be compounded from the 'golden models' of the parts that make up the project. Having such decomposition, the project may be developed in parallel with number of the team, according to the number of the parts. And each engineer have the verification environment to control correctness of his part in the whole project. If necessary, such decomposition of the separate parts may be done again. 2.5. Fast Simulation At stand along software simulation, the speed may achieve up to 10 million instructions per second. At the co-simulation of hardware and software simulation speed is vastly dependent on activity of the interaction a CPU with the rest hardware. For real application system simulation we achieved results from few thousands to few hundreds of thousands instructions per seconds. 3. Software And Hardware Components Of The IEESD-2000 3.1. Winter - The IDE For Software Development WInter support the source level development and debugging of the assembler software for chosen processors as well as software written on higher level programming languages if there are according compilers and debug information converters. The important features of WInter are: - support of multiprocessor system debugging - tools for peripherals and verification environments simulation. WInter provides the comprehensive set of debug possibilities from software project management with screen sources editing to condition breakpointing and profiling. 3.2. HLCCAD - The IDE For Hardware Development HLCCAD provides visual design and debugging of the hardware part of the embedded system. The hierarchical project can be compound from: - ready synthesizable components (RSC) - recursive compositions of RSC - user defined components. The final results of the debug process is automatically generated synthesizable VHDL description of the hardware as well as the according testbench sets. The base features of the HLCCAD: - multiprocessor system simulation and debugging; - the diversity of the tools for verification environment creation; - synthesis of devices with microprogram control[4]. 3.3. UniICE/UniICS - Hardware/Software Tools For Emulation For both UniICE and UniICS there are projects in IEESD-2000 as well as synthesizable VHDL description which may be used as on-chip debug components into user's project. There are real Altera FPGA devices as well. 3.4. UniSAn - Universal Syntax Analyzer UniSAn allows to describe the programming(verification) language with help of BNFs (Bekus-Naur Forms), defining the function that must be called at the marked point of syntax analysis. After that user can develop defining functions, compile them with UniSAn library and get the compiler he need as result. 4. Approbation examples This section contains description of the new approbation examples, that are not described in [1-5]. 4.1. Heterogeneous multiprocessor system "HomeNet". This special example demonstrates unique possibilities of the IEESD-2000 for co-development of the software and hardware of multiprocessor systems. In the example there are using the following MCs: Intel 8051, Atmel 90S2313, Motorola 68HC08, Texas Instruments TMS370. Conventional problem description is the following. There are home sensors measuring expense insensitivity for the water, electricity and gas. Each sensor is connected for own MC, each MC is connected for central MC and transmit his data with I2C protocol onto central MC that displays the data onto according indicators. More details can be found: http://newit.gsu.unibel.by/projects/HLCCAD/approbation/en/HomeNet.htm Achieved numbers of simulation speed is as follows: Real time of simulation - 10 seconds Simulated time - 0.013 second The ratio of real time to simulation time ~ 770 The number of simulated instruction for each processor per second: Texas Instruments TMS37O 25,400 Atmel AVR 90s2313 18,800 Motorola 68HC08 12,700 Intel 8051 730 4.2. Microprocessor apparatus I-160M. Apparatus is assigned to measure electrical characteristics of liquids. Used MP was Intel 8051. The software includes about 10,000 lines in C. It occupies nearly 50 Kb in the system RAM. All software was developed during 6 weeks without the real hardware. More details can be found: http://newit.gsu.unibel.by/winter Conclusion IEESD-2000 [1-5] - environment for co-development (co-design, co-verification, co-simulation) of hardware and software of embedded systems seamlessly integrates the possibility of HLCCAD, WInter and other tools described above. The IEESD-2000 effectively support all tendencies of hardware software and EDA tools development. User-friendly interface, built-in interactive textbook, context-sensitive help cut learning process. Free evaluation versions of the described tools can be downloaded from the developer (New IT Research Labs, Gomel, Belarus) site: http://newit.gsu.unibel.by University versions of the tools are used to provide on-line learning as well as design and programming contests on the site (also developed by New IT Research Labs) "Distance Learning in Belarus": http://dl.gsu.unibel.by Literature 1. M.Dolinsky "High-level design of embedded hardware-software systems", "Advances in Engineering Software" , Vol 31, No 3, March, 2000, UK, Oxford, "ELSEVIER" 2. Dolinsky M.S. "Integrated Environment IEESD-2000 for embedded system development", Automatic Control and Computer Sciences, Allerton Press, New York, 1999, Vol.33, No 3, pp. 24-32 3. Dolinsky M.S., Ziselman I.M., Fedortsov A.O "In-circuit emulators of microprocessors and microcontrollers" , Automatic Control and Computer Sciences, Allerton Press, New York, 1999 Vol 33, No 1, pp.53-56 4. Dolinsky M.S., Ziselman I.M., Harrasov A.A. "Computer-Aided design of microprogrammed devices" , Automatic Control and Computer Sciences, Allerton Press, New York, 1997, Vol. 31, No 5, pp.59-63 5. Dolinsky M.,Ziselman I.,Belotsky S. "Metalanguage for Peripherals Description and Simulation" Tagungsband 1 des 42. Internationalen Wissenschaftlichen Kolloquiums, Seite 587.